1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to a seal pattern for a liquid crystal display device.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices such as active matrix LCDs (AM LCDs) are widely used in devices such as notebook computers, desktop monitors, etc., due in part to their high resolution and their ability to display color and moving images. LCD devices generally include an upper substrate (i.e., an array substrate) coupled to, and spaced apart from, a lower substrate (i.e., a color filter substrate). A layer of liquid crystal material is typically disposed between the array and color filter substrates. Electrodes are provided on each of the upper and lower substrates such that electrodes of opposing substrates face each other. Anisotropic optical properties of the liquid crystal materials may be exploited by liquid crystal display devices to produce images. By varying the orientation of liquid crystal molecules in an electric field, the transmissivity of light within the layer of liquid crystal material may be selectively controlled. Liquid crystal display devices also include thin film transistors and pixel electrodes arranged in a matrix pattern.
Fabrication of LCD devices typically involves many processes including the formation of an array substrate, formation of a color filter substrate, and injection of liquid crystal material between the array and color filter substrates. Formation of array substrates includes forming switching elements and pixel electrodes. Formation of color filter substrates includes forming color filters and common electrodes.
FIG. 1 illustrates a cross-sectional view of a liquid crystal display panel used in a related art LCD device.
Referring to FIG. 1, an upper substrate 10 and a lower substrate 30 are coupled to, and spaced apart from each other. Liquid crystal material 50 is interposed between the upper and lower substrates 10 and 30. A gate electrode 32 is formed on a transparent substrate 1 included within the lower substrate 30 and a gate insulator 34 is formed on the gate electrode 32. A semiconductor layer 36, including an active layer 36a and an ohmic contact layer 36b, is formed on the gate insulator 34. A source electrode 38 and a drain electrode 40 are formed on the semiconductor layer 36. A channel region “ch”, including an exposed portion of the active layer 36a, is formed between the source electrode 38 and the drain electrode 40. The gate electrode 32, the semiconductor layer 36, the source electrode 38, the drain electrode 40, and the channel “ch” constitute a thin film transistor “T”. Though not shown in FIG. 1, a plurality of gate lines are connected to the gate electrode 32 and extend along a first direction. Further, a plurality of data lines are connected to the source electrode 38 and extend along a second direction, perpendicular to the first direction. Crossings of the gate and data lines define pixel regions “P”. A passivation layer 42, including a drain contact hole 44 formed therein, is formed on the thin film transistor “T”. A pixel electrode 48 is formed in the pixel region “P” and is connected to the drain electrode 40 via the drain contact hole 44. A cell area of the array substrate includes a connection portion for connecting to an external driving circuit. Accordingly, the cell area of the array substrate is wider than a corresponding cell area of the color filter substrate. A lower alignment layer 46 is formed on both the passivation layer 42 and the pixel electrode 48 in order to induce an alignment of the liquid crystal material 50. A color filter 14, for filtering light within a specific wavelength range, is formed beneath a transparent substrate 1 included within an upper substrate 30 at a position corresponding to the pixel electrode 48. A black matrix 12, for protecting light leakage and for preventing light from contacting the thin film transistor “T”, is formed in boundary areas between each color portion of the color filter 14. A common electrode 16, serving as an electrode with which to apply voltage to the layer of liquid crystal material 50, is formed beneath the color filter 14 and the black matrix 12. An upper alignment layer 18, similar to the lower alignment layer 46, is formed beneath the common electrode 16. A cell gap between the upper and lower substrates 10 and 30 is sealed using a seal pattern 52. The seal pattern 52 is provided along the edges of the substrates to prevent leakage of liquid crystal material 50. Additionally, the seal pattern 52 maintains the upper and lower substrates 10 and 30 a predetermined distance from one another (e.g., maintains the cell gap between the upper and lower substrates 10 and 30, respectively) and enables liquid crystal material to be injected.
As LCD manufacturing technologies progress, LCDs are finding new applications in lap-top computers, video cameras, aviation instrument panels, other electronic devices, etc., the manufacturable size of substrates in LCDs increase, and ways of fabricating LCDs to be thinner and lighter continue to be evaluated.
Typical glass substrates used in LCDs are about 0.7 mm thick. As the size of the substrate increases, however, the weight and thickness of the substrates must be reduced through chemical (e.g., with the use of etchant such as hydrofluoric acid) or physical (e.g., grinding, polishing, etc.) processes. Through these processes, minimum substrate thicknesses of about 0.5 mm to 0.6 mm are attainable upon consideration of factors such as substrate bending and external impacts encountered during a high speed revolution spin coating processes. Physical processes are often ineffective in maintaining optimal surface roughness and substrate thickness. Accordingly, chemical processes may be employed by dipping LCD substrates in, for example, a hydrofluoric acid solution.
The fabrication of liquid crystal cells includes forming an alignment layer to align liquid crystal molecules, forming a cell gap, cutting cells, injecting liquid crystal material, and sealing an injection hole arranged between the substrates.
FIG. 2 illustrates a flow chart of a process used in fabricating liquid crystal cells of ultra-thin liquid crystal display devices. A first process step (ST1) includes cleaning the array and color filter substrates by removing particles on the substrate prior to formation of the alignment layer on the substrate. A second process step (ST2) includes forming the alignment layer by forming thin polymer film on the substrate, hardening, and rubbing the thin polymer film. A third process step (ST3) includes forming a seal pattern and a spacer. The seal pattern forms a cell gap allowing the injection of liquid crystal material between material between the substrates and preventing the injected liquid crystal material from leaking. In ultra-thin liquid crystal display devices, the seal pattern also includes a dummy seal-pattern for preventing etchants from infiltrating into the cell gap during any of the aforementioned processes. The seal pattern is fabricated using screen-printing technology, thermosetting resin, and glass fiber. The spacer is usually formed on the array substrate and uniformly maintains the gap between the two substrates. The seal pattern is typically formed on the color filter substrate to minimize error in attaching the upper and lower substrates. A fourth process step (ST4) includes aligning and attaching the upper and lower substrates to each other. The degree to which the upper and lower substrates may be aligned is determined by a measuring an alignment margin, usually less than a few microns, provided when the substrates are initially designed. If the upper and lower substrates are aligned and attached with an alignment margin larger than a predetermined error margin, the display quality of the liquid crystal display device may be deteriorated due to light leakage during operation of the liquid crystal cell. After the seal pattern is formed on one of the upper or lower substrates, the substrates undergo a pre-heating process and are attached together in a temporary fixing process. Subsequently, the substrates are permanently attached together using a hardening process (e.g., a thermo-compression bonding process). A fifth process step (ST5) includes cutting the attached substrates into a unit cell. A single glass substrate typically includes a plurality of smaller array or color filter substrates in cell areas that need to be separated. A sixth process step (ST6) includes injecting liquid crystal material into the unit cells. Since each cell has a cell gap of only a few micrometers per hundreds of square centimeters in substrate area, a vacuum injection method, inducing a capillary phenomenon within the cell gap, is typically used in injecting liquid crystal material into the cell. After the liquid crystal material is injected to the cell, an injection hole through which the liquid crystal material was injected, is sealed. A seventh process step (ST7) includes forming an ultra-thin substrate by etching the exterior surfaces of the attached substrates. As will be described in greater detail below, this etching process includes a cleaning step, an etching step, and a drying step. Upon completion of the aforementioned processing steps, the liquid crystal display panels are inspected. Subsequently, a polarization film is formed on an outer surface of each of the substrates and a driving circuit is connected to the substrates.
FIG. 3 illustrates a flow chart of an etching process for forming ultra-thin substrates described in step ST7 of FIG. 2.
Referring to FIG. 3, a first processing step (ST1) including removing contaminants from the exterior surfaces of the attached substrates is performed before they are etched within an etching apparatus. Contaminants found on the outer surfaces of the attached substrates can cause etching errors and prevent uniform etching of the substrates. Etching errors and non-uniform etching result in a degradation in the quality of images displayable by the liquid crystal display device by diffusing reflections and refractions at the surface of the attached substrates. Contaminants include organic films or minute particles and may be removed using clearing solutions such as IPA (isopropyl alcohol) or DI water (deionized water). After contaminants are removed, the cleaned substrates are arranged within an etching apparatus containing an etchant such as a hydrofluoric acid (HF) solution and are etched for a predetermined amount of time in a second processing step (STII). Subsequently, in third processing step (STIII), any etchant remaining on the substrates is removed. Finally, in fourth processing step (STIV), the cleaned substrates are dried.
FIG. 4 illustrates a plan view of a seal pattern used in typical ultra-thin liquid crystal display devices.
Referring to FIG. 4, a glass substrate may, for example, include two liquid crystal cells. The seal pattern of the ultra-thin type liquid crystal display device includes a main seal pattern 60a, in which the injection hole 61 is provided, and a dummy-seal pattern 60b surrounding the main seal pattern 60a. The dummy-seal pattern 60b does not contain any openings and thereby prevents etchant or cleaning solution from penetrating into the main seal pattern 60a. 
FIG. 5 illustrates a cross-sectional view along a line V—V shown in FIG. 4.
Referring to FIG. 5, air between the main seal pattern 60a and the dummy-seal pattern 60b is introduced when a substrate 68 is attached. Because the dummy-seal pattern 60b does not include an opening, air becomes trapped between the substrates and the seal patterns and may cause serious problems. The air trapped between the main seal pattern 60a and the dummy-seal pattern 60b may induce a rupture 64 in the main seal pattern 60a and produce air bubbles 66 in the dummy-seal pattern 60b. 
In order to solve the foregoing problems, Applicants of the present invention have disclosed in U.S. patent application Ser. No. 09/737,766, filed Aug. 9, 2001, a seal pattern structure for the ultra-thin liquid crystal display devices. FIG. 6A illustrates a plan view of the seal pattern structure of the ultra-thin liquid crystal display device disclosed in the aforementioned application. A plurality of seal patterns 82 is formed on the substrate 70 of the liquid crystal cell 72.
Referring to FIG. 6A, the seal pattern 82 includes a main seal pattern 74 having an injection hole 73, a first dummy-seal pattern 76 surrounding the main seal pattern 74 and a second dummy-seal pattern 78 surrounding the first dummy-seal pattern 76 and maintained a predetermined distance from an edge of the substrate 70. The first and second dummy-seal patterns 76 and 78, respectively, include at least one opening, VIa. A third dummy-seal pattern 80 is formed between the first and second dummy-seal patterns 76 and 78, respectively, adjacent to at least one opening VIa of the second dummy-seal pattern 78.
FIG. 6B illustrates a magnified view of area “VIb” shown in FIG. 6A including an exhaust path taken by air during the thermo-compression bonding process;
Referring to FIG. 6B, when the air is exhausted from the liquid crystal cell 72 during the thermo-compression bonding process, a bottleneck phenomenon occurs and a high air pressure is concentrated at the injection hole 73. However, the exhaust path defined by the seal pattern shown in FIG. 6B is also long and tortuous. Accordingly, the exhaust path shown in FIG. 6B is inefficient in facilitating the transport of air and contributes to the generation of highly pressurized air at injection hole 73. The high air pressure weakens the adhesive strength of the sealant at the injection hole 73 and increases the likelihood of cell gap errors. Furthermore, alignment spots, capable of preventing certain pre-tilt angles from being imparted to the liquid crystal-material, may be generated in a portion of the alignment layers located near the injection hole 73 as a result of the high air pressure.